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SN65LVDS305 Key Features

  • FlatLink™3G Serial-Interface Technology
  • patible With FlatLink3G Receivers Such
  • Input Supports 24-bit RGB Video Mode Interface
  • 24-Bit RGB Data, 3 Control Bits, 1 Parity Bit, and 2 Reserved Bits Transmitted Over One Differential Line
  • SubLVDS Differential Voltage Levels
  • Effective Data Throughput up to 405 Mbps
  • Three Operating Modes to Conserve Power
  • Active-Mode QVGA 17.4 mW (Typical)
  • Shutdown Mode ≈ 0.5 µA (Typical)
  • Standby Mode ≈ 0.5 µA (Typical)

Related Texas Instruments Datasheets

Part Number Description
SN65LVDS301 Programmable 27-Bit Parallel-to-Serial Transmitter
SN65LVDS302 Programmable 27-Bit Serial-to-Parallel Receiver
SN65LVDS306 PROGRAMMABLE 27-BIT SERIAL-TO-PARALLEL RECEIVER
SN65LVDS307 PROGRAMMABLE 27-BIT PARALLEL-TO-SERIAL TRANSMITTER
SN65LVDS308 PROGRAMMABLE 27-BIT PARALLEL-TO-SERIAL RECEIVER

SN65LVDS305 Description

The SN65LVDS305 serializer device converts 27 parallel data inputs to one sub-low-voltage differential signaling (SubLVDS) serial output. It loads a shift register with 24 pixel bits and 3 control bits from the parallel CMOS input interface. In addition to the 27 data bits, the device adds a parity bit and two reserved bits into a 30-bit data word.