Download SN65LVDS302 Datasheet PDF
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SN65LVDS302 Key Features

  • Serial interface technology
  • patible with FlatLink™3G such as
  • Supports video interfaces up to 24-bit RGB data
  • SubLVDS differential voltage levels
  • Up to 1.755-Gbps Data Throughput
  • Three operating modes to conserve power
  • Active mode QVGA: 17 mW
  • Typical shutdown: 0.7 μW
  • Typical standby mode: 27 μW Typical
  • Bus-swap function for PCB-layout flexibility

SN65LVDS302 Description

The SN65LVDS302 receiver de-serializes FlatLink™3G pliant serial input data to 27 parallel data outputs. The SN65LVDS302 receiver contains one shift register to load 30 bits from 1, 2 or 3 serial inputs and latches the 24 pixel bits and 3 control bits out to the parallel CMOS outputs after checking the parity bit. If the parity check confirms correct parity, the Channel Parity Error (CPE) output remains low.