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SN65LVDS301 - Programmable 27-Bit Parallel-to-Serial Transmitter

Description

The SN65LVDS301 serializer device converts 27 parallel data inputs to 1, 2, or 3 Sub Low-Voltage Differential Signaling (SubLVDS) serial outputs.

It loads a shift register with 24 pixel bits and 3 control bits from the parallel CMOS input interface.

Features

  • FlatLink™3G serial interface technology.
  • Compatible with FlatLink3G receivers such as SN65LVDS302.
  • Input supports 24-bit RGB video mode interface.
  • 24-Bit RGB data, 3 control bits, 1 parity bit and 2 reserved bits transmitted over 1, 2 or 3 differential lines.
  • SubLVDS differential voltage levels.
  • Effective data throughput up to 1755 Mbps.
  • Three operating modes to conserve power.
  • Active-mode QVGA 17.4 mW (typ).
  • Activ.

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Other Datasheets by Texas Instruments

Part Number Description
SN65LVDS302 Programmable 27-Bit Serial-to-Parallel Receiver
SN65LVDS305 PROGRAMMABLE 27-BIT DISPLAY SERIAL INTERFACE TRANSMITTER
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Full PDF Text Transcription

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www.ti.com SN65LVDS301 SLLS681E – FEBRUARY 2006 – REVISESDNO6C5TLOVBDERS2300210 SLLS681E – FEBRUARY 2006 – REVISED OCTOBER 2020 SN65LVDS301 Programmable 27-Bit Parallel-to-Serial Transmitter 1 Features • FlatLink™3G serial interface technology • Compatible with FlatLink3G receivers such as SN65LVDS302 • Input supports 24-bit RGB video mode interface • 24-Bit RGB data, 3 control bits, 1 parity bit and 2 reserved bits transmitted over 1, 2 or 3 differential lines • SubLVDS differential voltage levels • Effective data throughput up to 1755 Mbps • Three operating modes to conserve power – Active-mode QVGA 17.4 mW (typ) – Active-mode VGA 28.8 mW (typ) – Shutdown mode 0.5 μA (typ) – Standby mode 0.5 μA (typ) • Bus swap for increased PCB layout flexibility • 1.
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