Download the TC74HC42AF datasheet PDF.
This datasheet also covers the TC74HC42AP variant, as both devices belong to the same bcd to decimal decoder family and are provided as variant models within a single manufacturer datasheet.
Key Features
High speed: tpd = 13 ns (typ. ) at VCC = 5 V.
Low power dissipation: ICC = 4 μA (max) at Ta = 25°C.
High noise immunity: VNIH = VNIL = 28% VCC (min).
Output drive capability: 10 LSTTL loads.
Symmetrical output impedance: |IOH| = IOL = 4 mA (min).
Balanced propagation delays: tpLH ∼.
tpHL.
Wide operating voltage range: VCC (opr) = 2 to 6 V.
Pin and function compatible with 74LS42
Pin Assignment
TC74HC42AP TC74HC42AF.
Full PDF Text Transcription for TC74HC42AF (Reference)
Note: Below is a high-fidelity text extraction (approx. 800 characters) for
TC74HC42AF. For precise diagrams, and layout, please refer to the original PDF.
TC74HC42AP/AF TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC42AP, TC74HC42AF BCD to Decimal Decoder The TC74HC42A is a high speed CMOS BCD-to-DECIMAL D...
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to Decimal Decoder The TC74HC42A is a high speed CMOS BCD-to-DECIMAL DECODER fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. A BCD code applied to the four inputs (A-D) sets a low level at one of ten decoded outputs. A illegal BCD code such as eleven thru fifteen sets all outputs high. This device can be used as 3-to-8 LINE DECODER when input D is held low. This device is useful for code conversion, address decoding, memory selection, multiplexing, or readout decoding. All inputs are equipped with protection ci
TC74HC42AF Datasheet
