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T431616C - 1M x 16 SDRAM 512K x 16bit x 2Banks Synchronous DRAM

General Description

The T431616C is 16,777,216 bits synchronous high data rate Dynamic RAM organized as 2 x 524,288 words by 16 bits , fabricated with high performance CMOS technology .

Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle .

Key Features

  • 3.3V power supply Clock cycle time : 6 / 7 ns Dual banks operation LVTTL compatible with multiplexed address All inputs are sampled at the positive going edge of system clock.
  • Burst Read Single-bit Write operation.
  • DQM for masking.
  • Auto refresh and self refresh.
  • 32ms refresh period (2K cycle).
  • MRS cycle with address key programs - CAS Latency ( 2 & 3 ) - Burst Length ( 1 , 2 , 4 , 8 & full page) - Burst Type (Sequential & Interleave).
  • Availab.

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Datasheet Details

Part number T431616C
Manufacturer TMT
File Size 719.12 KB
Description 1M x 16 SDRAM 512K x 16bit x 2Banks Synchronous DRAM
Datasheet download datasheet T431616C Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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tm • • • • • TE CH T431616C SDRAM FEATURES 3.