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S T S 8201
S amHop Microelectronics C orp. J an. 03 2006
Dual N-C hannel E nhancement Mode Field E ffect Transistor
P R ODUC T S UMMAR Y
V DS S
20V
F E AT UR E S
( mW ) Max
ID
5A
R DS (ON)
S uper high dense cell design for low R DS (ON ).
27 @ V G S = 4.0V 40 @ V G S = 2.5V
R ugged and reliable. S urface Mount P ackage. E S D P rotected.
D1 D2
S OT26 Top View
S1 D1/D2 S2
1 2 3
6 5 4
G1 D1/D2 G2
G1
G2
S1
S2
ABS OLUTE MAXIMUM R ATINGS (T A=25 C unless otherwise noted)
P arameter Drain-S ource Voltage Gate-S ource Voltage Drain C urrent-C ontinuous @ T J =25 C -P ulsed
b
S ymbol V DS V GS ID IDM IS PD T J , T S TG
Limit 20 12 5 20 1.25 1.
STS8201 Datasheet
