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RD74LVC16374B - 16-bit D-type Flip Flops

Description

The RD74LVC16374B has sixteen edge trigger D type flip flops with three state outputs in a 48 pin package.

Data at the D inputs meeting set up requirements are transferred to the Q outputs on positive going transitions of the clock input.

Features

  • VCC = 1.65 V to 5.5 V All inputs VIH (Max. ) = 5.5 V (@VCC = 0 V to 5.5 V) All outputs VOUT (Max. ) = 5.5 V (@VCC = 0 V or output off state) Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C) High output current ±4 mA (@VCC = 1.65 V) ±8 mA (@VCC = 2.3 V) ±12 mA (@VCC = 2.7 V) ±24 mA (@VCC = 3.0 V to 5.5 V).
  • Ordering Information Part Name RD74LVC16374BTEL Package Ty.

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Datasheet Details

Part number RD74LVC16374B
Manufacturer Renesas Technology
File Size 105.75 KB
Description 16-bit D-type Flip Flops
Datasheet download datasheet RD74LVC16374B Datasheet
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Full PDF Text Transcription

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www.DataSheet4U.com RD74LVC16374B 16-bit D-type Flip Flops with 3-state Outputs REJ03D0501–0100 Rev.1.00 Jan. 24, 2005 Description The RD74LVC16374B has sixteen edge trigger D type flip flops with three state outputs in a 48 pin package. Data at the D inputs meeting set up requirements are transferred to the Q outputs on positive going transitions of the clock input. When the latch enable goes low, data at the D inputs will be retained at the outputs until latch enable returns high again. When a high logic level is applied to the output control input, all outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of the storage elements.
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