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74F378 - Hex D flip-flop with enable

Description

The 74F378 has six edge-triggered D-type flip-flops with individual D inputs and Q outputs.

The common buffered Clock (CP) input loads all flip-flops simultaneously when the Enable (E) input is Low.

The register is fully edge-triggered.

Features

  • 6-bit high-speed parallel register.
  • Positive edge-triggered D-type inputs.
  • Fully buffered common Clock and Enable inputs.
  • Input clamp diodes limit high speed termination effects.
  • Fully TTL and CMOS compatible.

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Full PDF Text Transcription

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INTEGRATED CIRCUITS 74F378 Hex D flip-flop with enable Product specification IC15 Data Handbook 1989 Oct 05 Philips Semiconductors Philips Semiconductors Product specification Hex D flip-flop with enable 74F378 FEATURES • 6-bit high-speed parallel register • Positive edge-triggered D-type inputs • Fully buffered common Clock and Enable inputs • Input clamp diodes limit high speed termination effects • Fully TTL and CMOS compatible DESCRIPTION The 74F378 has six edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously when the Enable (E) input is Low. The register is fully edge-triggered.
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