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74F37 Quad Two-Input NAND Buffer
April 1988 Revised September 2000
74F37 Quad Two-Input NAND Buffer
General Description
This device contains four independent gates, each of which performs the logic NAND function.
Ordering Code:
Order Number Package Number
Package Description
74F37SC
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
74F37SJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74F37PC
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
IEEE/IEC
Unit Loading/Fan Out
Function Table
Pin Names Description
U.L.
74F37 Datasheet
