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74F377A - Octal D-type flip-flop

Description

The 74F377A has 8 edge-triggered D-type flip-flops with individual D inputs and Q outputs.

The common buffered clock (CP) input loads all flip-flops simultaneously when the Enable (E) input is Low.

The register is fully edge triggered.

Features

  • High states).
  • High impedance inputs for reduced loading (20µA in Low and.
  • Ideal for addressable register.

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INTEGRATED CIRCUITS 74F377A Octal D-type flip-flop with enable Product specification IC15 Data Handbook 1996 Mar 12 Philips Semiconductors Philips Semiconductors Product specification Octal D-type flip-flop with enable 74F377A FEATURES High states) • High impedance inputs for reduced loading (20µA in Low and • Ideal for addressable register applications • Enable for address and data synchronization applications • Eight edge–triggered D–type flip–flops • Buffered common clock • See ’F273A for Master Reset version • See ’F373 for transparent latch version • See ’F374 for 3–State version TYPE 74F377A TYPICAL fMAX 165MHz DESCRIPTION The 74F377A has 8 edge-triggered D-type flip-flops with individual D inputs and Q outputs.
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