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PLL52C64-06
Clock Gen er ator with Zero De lay Out put Buff ers FEATURES
n Generates 7 synchronous zero delay PCI bus clocks. n Designed to work with PLL52C64-05 or PLL52C64-25
PIN INFORMATION
for EMI reduction.
n Less than 250ps propagation delay from BCLKIN to BCLK n n n n n n n n
output when equally loaded. Two 14.318Mz reference clocks Two 2.5V IOAPIC clocks for dual processors. One 24Mhz and one 48Mhz USB clock All outputs have very low Cycle to cycle jitter (<150ps) < 250ps output skew between PCI bus clock < 250ps output skew between IOAPIC clock 50% duty cycle outputs. Available in 300mil 24 pin SOP.
DESCRIPTION
The PLL52C64-06 is a high performance clock generator designed specifically to support the very tight timing requirement of Pentium PC Motherboards.
PLL52C64-06 Datasheet
