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PLL52C61-21HA - Pentium/SDRAM Clock Generator

Download the PLL52C61-21HA datasheet PDF. This datasheet also covers the PLL52C61-01HA variant, as both devices belong to the same pentium/sdram clock generator family and are provided as variant models within a single manufacturer datasheet.

Description

The PLL52C61-01HA and -21HA are high performance system clock generators designed to support INTEL 430VX PCIset’s motherboard with SDRAM Pentium based systems.

All output clocks skew and jitter performance are designed to be fully compliant with INTEL Pentium CPU timing requirements.

Features

  • n Generates all clock frequencies for Pentium, AMD and Cyrix system requiring multiple CPU clocks (SDRAM, Shared memory architecture). n Supports up to12 Synchronous CPU clocks. n 6 PCI BUS clocks selectable between synchronous and asynchronous mode. n One 14.318Mhz reference clock n One 24Mhz floppy clock and one 48Mhz USB clock. n Proven power-on strapping techniques to minimize four input pins. In any cases, no glitches will be produced from the output pins during power on. n 3.3V and 5V oper.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (PLL52C61-01HA-PhaseLink.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number PLL52C61-21HA
Manufacturer PhaseLink
File Size 227.41 KB
Description Pentium/SDRAM Clock Generator
Datasheet download datasheet PLL52C61-21HA Datasheet

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Other Datasheets by PhaseLink

Part Number Description
PLL52C61-23 Pentium/SDRAM Clock Generator
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PLL52C64-06 Clock Generator
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Full PDF Text Transcription

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PLL52C61-01HA/-21HA Pentium/SDRAM Clock Generator with Integrated Buffers FEATURES n Generates all clock frequencies for Pentium, AMD and Cyrix system requiring multiple CPU clocks (SDRAM, Shared memory architecture). n Supports up to12 Synchronous CPU clocks. n 6 PCI BUS clocks selectable between synchronous and asynchronous mode. n One 14.318Mhz reference clock n One 24Mhz floppy clock and one 48Mhz USB clock. n Proven power-on strapping techniques to minimize four input pins. In any cases, no glitches will be produced from the output pins during power on. n 3.3V and 5V operation. n Available in 300mil 28 pin SOIC and 32 pin SOJ.
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