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(Preliminary) PL130-00
Selectable High Speed Translator Buffer to CMOS, PECL, LVDS
FEATURES
User selectable output: Differential PECL, Differential LVDS or CMOS/TTL
Single internally AC coupled input Accepts input signal swings as low as 100mV Input range from DC to 1.3 GHz. 3.3V operation. Available in DIE (65 mil x 62 mil).
DESCRIPTIONS
The PL130-00 is a low cost, high performance, high speed, buffer that reproduces any input frequency from DC to 1.3GHz. It provides selectable user outputs, between differential PECL, differential LVDS or CMOS/TTL. Any input signal with at least 100mV swing can be used as reference signal. This chip is ideal for conversion from sine wave, TTL, CMOS, or LVDS to PECL, LVDS or CMOS.
PL130-00 Datasheet
