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PL130-09
High Speed Translator Buffer to LVDS
FE AT UR E S
Differential LVDS output Single AC coupled input (min. 100mV swing). Input range from 0 to 1.0GHz. 2.5V to 3.3V operation. Available in 8-Pin SOP or 3x3mm QFN
GREEN/RoHS compliant packaging.
PIN CONFIGURATION
(TOP VIEW)
GND REF_IN
1 2
8 VDD 7 GND
PL130-09
GND 3
6 LVDS_BAR
DESCRIPTION
LVDS 4
5 VDD
The PL130-09 is a low cost, high performance, high speed, buffer that reproduces any input frequency from 0 to 1.0GHz. It provides a pair of differential LVDS output. Any input signal with at
least 100mV swing can be used as reference signal. This chip is ideal for conversion from sine wave, TTL, CMOS, or PECL to LVDS.