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Preliminary
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PLL520-30
PECL and LVDS Low Phase Noise VCXO (for 65-130MHz Fund Xtal)
DIE CONFIGURATION
65 mil
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FEATURES
• • • • • • • • • 65MHz to 130MHz Fundamental Mode Crystal. Output range: 65MHz – 130MHz (no PLL). Low Injection Power for crystal 50uW. Complementary outputs: PECL or LVDS. Selectable OE Logic Integrated variable capacitors. Supports 2.5V or 3.3V-Power Supply. Available in die form. Thickness 10 mil.
(1550,1475)
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15
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62 mil
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DESCRIPTIONS
Y
(0,0)
PLL520-30 is a VCXO IC specifically designed to pull frequency fundamental crystals from 65MHz to 130MHz, with selectable PECL or LVDS outputs and OE logic (enable high or enable low).