Full PDF Text Transcription for MC74VHC138 (Reference)
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MC74VHC138. For precise diagrams, and layout, please refer to the original PDF.
MC74VHC138 3-to-8 Line Decoder The MC74VHC138 is an advanced high speed CMOS 3−to−8 decoder fabricated with silicon gate CMOS technology. It achieves high speed operation...
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ed with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation. When the device is enabled, three Binary Select inputs (A0 − A2) determine which one of the outputs (Y0 − Y7) will go Low. When enable input E3 is held Low or either E2 or E1 is held High, decoding function is inhibited and all outputs go high. E3, E2, and E1 inputs are provided to ease cascade connection and for use as an address decoder for memory systems. The internal circuit is composed of three stages, including a buffer output which provides high noise immunit
MC74VHC138 Datasheet
