Full PDF Text Transcription for MC74VHC126 (Reference)
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MC74VHC126. For precise diagrams, and layout, please refer to the original PDF.
MC74VHC126 Quad Bus Buffer with 3−State Control Inputs The MC74VHC126 is a high speed CMOS quad bus buffer fabricated with silicon gate CMOS technology. It achieves nonin...
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buffer fabricated with silicon gate CMOS technology. It achieves noninverting high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation. The MC74VHC126 requires the 3−state control input (OE) to be set Low to place the output into high impedance. The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output. The inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V systems to 3.0 V systems. • High Speed: tPD = 3.8 ns (Typ) at VCC = 5.0 V • Low Power Dissipation: ICC = 4.
MC74VHC126 Datasheet
