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SM8211M - POCSAG Decoder

Description

Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 I:Input O:Output NIPPON PRECISION CIRCUITS 2 Name XVDD BS1 BS2 BS3 VDD TEST1 TEST2 TX-CLK TX-DATA BREAK RST RX-DATA BACKUP SIG-IN VSS ADD-DET RX-CLK SYN-VAL XT XTN I/O O O O I I I I I I O I I O O O I O De

Features

  • s s s s TX-CLK TX-DATA BREAK s s 4 4 0.68 0.12 s s s s s s NIPPON.

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Datasheet preview – SM8211M

Datasheet Details

Part number SM8211M
Manufacturer Nippon Precision Circuits Inc
File Size 145.46 KB
Description POCSAG Decoder
Datasheet download datasheet SM8211M Datasheet
Additional preview pages of the SM8211M datasheet.

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Full PDF Text Transcription

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SM8211M NIPPON PRECISION CIRCUITS INC. POCSAG Decoder For Pagers OVERVIEW The SM8211M is a POCSAG-standard (Post Office Code Standardization Advisory Group) signal processor LSI, which conforms to CCIR recommendation 584 concerning standard international wireless calling codes. The SM8211M supports call messages in either tone, numerical or character outputs at signal speeds of 512 bps or 1200 bps using a 76.8 kHz system clock, or 2400 bps using a double-speed 153.6 kHz system clock. Note that output timing values for 2400 bps mode operation are not shown in this datasheet, but can be obtained by halving the values for 1200 bps mode operation.
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