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DM74LS491 - 10-Bit Counter

General Description

The ten-bit counter can count up count down set and load 2 LSB’s 2 MSB’s and 6 middle bits high or low as a group All operations are synchronous with the clock SET overrides LOAD COUNT and HOLD LOAD overrides COUNT COUNT is conditional on CIN otherwise it holds All outputs are enabled when OE is low

Key Features

  • Benefits Y Y Y Y Y CRT vertical and horizontal timing generation Bus-structured pinout 24-pin.

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Full PDF Text Transcription for DM74LS491 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for DM74LS491. For precise diagrams, tables, and layout, please refer to the original PDF.

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DM54LS491 74LS491 10-Bit Counter July 1989 DM54LS491 74LS491 10-Bit Counter General Description The ten-bit counter can count up count down set and load 2 LSB’s 2 MSB’s and 6 middle bits high or low as a group All operations are synchronous with the clock SET overrides LOAD COUNT and HOLD LOAD overrides COUNT COUNT is conditional on CIN otherwise it holds All outputs are enabled when OE is low otherwise HIGH-Z The 24 mA IOL outputs are suitable for driving RAM PROM address lines in video graphics systems Features Benefits Y Y Y Y Y CRT vertical and horizontal timing generation Bus-structured pinout 24-pin SKINNYDIP saves space TRI-STATE outputs drive bus lines Low current PNP inputs reduce loading Connection Diagram Top View Standard Test Load TL L 8332 – 2 TL L 8332 – 1 Order Num