Datasheet4U Logo Datasheet4U.com

S32R264 - 32-bit CPU

This page provides the datasheet information for the S32R264, a member of the S32R274 32-bit CPU family.

Description

10 9.3 LVDS Fast Asynchronous Transmission (LFAST) electrical 3.2 Fields 10 characteristics 49 4 General 11 9.4 Serial Peripheral Interface (SPI) timing specifications 53 4.1 Absolute maximum ratings 11 9.5 LINFlexD timing specifications

Features

  • On-chip modules available within the device include the following features:.
  • Safety core: Power Architecture® e200Z4 32-bit CPU with checker core.
  • Dual issue computation cores: Power Architecture® e200Z7 32-bit CPU.
  • 2 MB on-chip code flash (FMC flash) with ECC.
  • 1.5 MB on-chip SRAM with ECC.
  • RADAR processing.
  • Signal Processing Toolbox (SPT) for RADAR signal processing acceleration.
  • Cross Timing Engine (CTE) for precise timin.

📥 Download Datasheet

Datasheet preview – S32R264

Datasheet Details

Part number S32R264
Manufacturer NXP
File Size 1.13 MB
Description 32-bit CPU
Datasheet download datasheet S32R264 Datasheet
Additional preview pages of the S32R264 datasheet.

📁 Similar Datasheet

  • S3205 - VOICE ROM (Mosel Vitelic)
  • S320J - Silicon Standard Recovery Diode (GeneSiC)
  • S320JR - Silicon Standard Recovery Diode (GeneSiC)
  • S320K - Silicon Standard Recovery Diode (GeneSiC)
  • S320KR - Silicon Standard Recovery Diode (GeneSiC)
  • S320M - Silicon Standard Recovery Diode (GeneSiC)
  • S320MR - Silicon Standard Recovery Diode (GeneSiC)
  • S320Q - Silicon Standard Recovery Diode (GeneSiC)
  • S320QR - Silicon Standard Recovery Diode (GeneSiC)
  • S3225A - SMD Crystal (ETC)
Other Datasheets by NXP

Full PDF Text Transcription

Click to expand full text
NXP Semiconductors Data Sheet: Technical Data S32R274/S32R264 Series Data Sheet Supports S32R274K, S32R274J, S32R264K and S32R264J Features • On-chip modules available within the device include the following features: • Safety core: Power Architecture® e200Z4 32-bit CPU with checker core • Dual issue computation cores: Power Architecture® e200Z7 32-bit CPU • 2 MB on-chip code flash (FMC flash) with ECC • 1.
Published: |