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SY10ELT22 - DUAL TTL-to-DIFFERENTIAL PECL TRANSLATOR

This page provides the datasheet information for the SY10ELT22, a member of the SY100ELT22 DUAL TTL-to-DIFFERENTIAL PECL TRANSLATOR family.

Description

The SY10/100ELT22 are dual TTL-to-differential PECL translators.

Because PECL (Positive ECL) levels are used, only +5V and ground are required.

Features

  • 300ps typical propagation delay.

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Datasheet preview – SY10ELT22

Datasheet Details

Part number SY10ELT22
Manufacturer Micrel Semiconductor
File Size 103.27 KB
Description DUAL TTL-to-DIFFERENTIAL PECL TRANSLATOR
Datasheet download datasheet SY10ELT22 Datasheet
Additional preview pages of the SY10ELT22 datasheet.

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Other Datasheets by Micrel Semiconductor
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Full PDF Text Transcription

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www.DataSheet4U.com Micrel, Inc. DUAL TTL-to-DIFFERENTIAL PECL TRANSLATOR SY10ELT22 SY100ELT22 SY10ELT22 SY100ELT22 FEATURES ■ ■ ■ ■ ■ ■ 300ps typical propagation delay <100ps output-to-output skew Differential PECL outputs PNP TTL inputs for minimal loading Flow-through pinouts Available in 8-pin SOIC package DESCRIPTION The SY10/100ELT22 are dual TTL-to-differential PECL translators. Because PECL (Positive ECL) levels are used, only +5V and ground are required. The small outline 8-lead SOIC package and the low skew, dual gate design of the ELT22 makes it ideal for applications which require the tranlation of a clock and a data signal.
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