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SY100EL29V - 5V/3.3V Dual Differential Data and Clock D Flip-Flop

Datasheet Summary

Description

The SY100EL29V is a dual differential register with differential data (inputs and outputs) and clock.

The registers are triggered by a positive transition of the positive clock (CLK) input.

A HIGH on the Reset (Rx) asynchronously resets the appropriate register so that the Q outputs go LOW.

Features

  • 3.3V and 5V Power Supply Option.
  • Differential D, CLK and Q.
  • Extended VEE Range of.
  • 3.0V to.
  • 5.5V.
  • VBB Output for Single-Ended Use.
  • 1100 MHz Min. Toggle Frequency.
  • Asynchronous Reset and Set.
  • Available in 20-Pin SOIC Package Package Type SY100EL29V 20-Lead SOIC (Z) R0 VCC Q0 /Q0 S0 S1 VCC Q1 /Q1 VEE 20 19 18 17 16 15 14 13 12 11 QQ R S D CLK QQ S R D CLK 1 2 3 4 5 6 7 8 9 10 D0 /D0 CLK0 /CLK0 VBB D1 /D1 CLK1.

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Datasheet Details

Part number SY100EL29V
Manufacturer Microchip
File Size 714.10 KB
Description 5V/3.3V Dual Differential Data and Clock D Flip-Flop
Datasheet download datasheet SY100EL29V Datasheet
Additional preview pages of the SY100EL29V datasheet.

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Full PDF Text Transcription

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SY100EL29V 5V/3.3V Dual Differential Data and Clock D Flip-Flop with Set and Reset Features • 3.3V and 5V Power Supply Option • Differential D, CLK and Q • Extended VEE Range of –3.0V to –5.5V • VBB Output for Single-Ended Use • 1100 MHz Min. Toggle Frequency • Asynchronous Reset and Set • Available in 20-Pin SOIC Package Package Type SY100EL29V 20-Lead SOIC (Z) R0 VCC Q0 /Q0 S0 S1 VCC Q1 /Q1 VEE 20 19 18 17 16 15 14 13 12 11 QQ R S D CLK QQ S R D CLK 1 2 3 4 5 6 7 8 9 10 D0 /D0 CLK0 /CLK0 VBB D1 /D1 CLK1 /CLK1 R1 General Description The SY100EL29V is a dual differential register with differential data (inputs and outputs) and clock. The registers are triggered by a positive transition of the positive clock (CLK) input.
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