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HCS138MS - Radiation Hardened Inverting3-to-8 Line Decoder/Demultiplexer

Datasheet Summary

Features

  • 3 Micron Radiation Hardened SOS CMOS.
  • Total Dose 200K RAD (Si).
  • SEP Effective LET No Upsets: >100 MEV-cm2/mg.
  • Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit- Day (Typ).
  • Latch-Up Free Under Any Conditions.
  • Fanout (Over Temperature Range) - Standard Outputs - 10 LSTTL Loads.
  • Military Temperature Range: -55oC to +125oC.
  • Significant Power Reduction Compared to LSTTL ICs.
  • DC Operating Voltage Range: 4.5V to 5.5.

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Datasheet Details

Part number HCS138MS
Manufacturer Intersil
File Size 472.95 KB
Description Radiation Hardened Inverting3-to-8 Line Decoder/Demultiplexer
Datasheet download datasheet HCS138MS Datasheet
Additional preview pages of the HCS138MS datasheet.

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Full PDF Text Transcription

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DATASHEET HCS138MS Radiation Hardened Inverting3-to-8 Line Decoder/Demultiplexer FN2473 Rev 3.01 Feb 24, 2022 The HCS138MS is a Radiation Hardened 3-to-8 line Decoder/Demultiplexer. The outputs are active in the low state. Two active low and one active high enables (E1, E2, E3) are provided. If the device is enabled, the binary inputs (A0, A1, A2) determine which one of the eight normally high outputs will go to a low logic level. The HCS138MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family. The HCS138MS is supplied in a 16 lead Ceramic flatpack (K suffix) or a SBDIP Package (D suffix).
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