Datasheet4U Logo Datasheet4U.com

HCS125MS - Radiation Hardened Quad Buffer

Datasheet Summary

Description

The Intersil HCS125MS is a Radiation Hardened quad three-state buffer, each having its own output enable input.

A high level on the enable input puts the output in a high impedance state.

The HCS125MS utilizes advanced CMOS/SOS technology to achieve high-speed operation.

Features

  • 3 Micron Radiation Hardened SOS CMOS Total Dose 200K RAD (Si) SEP Effective LET No Upsets: >100 MEV-cm2/mg Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day (Typ) Dose Rate Survivability: >1 x 1012 RAD (Si)/s Dose Rate Upset >1010 RAD (Si)/s, 20ns Pulse Latch-Up Free Under Any Conditions Military Temperature Range: -55oC to +125oC Significant Power Reduction Compared to LSTTL IC.

📥 Download Datasheet

Datasheet preview – HCS125MS

Datasheet Details

Part number HCS125MS
Manufacturer Intersil Corporation
File Size 93.82 KB
Description Radiation Hardened Quad Buffer
Datasheet download datasheet HCS125MS Datasheet
Additional preview pages of the HCS125MS datasheet.

📁 Similar Datasheet

  • HCS12 - USB2.0 to ATA/ATAPI Bridge (Motorola Inc)
  • HCS1206 - METAL STRIP CURRENT SENSING RESISTORS (HITANO)
  • HCS12H - 16-bit Microcontroller (Freescale Semiconductor)
  • HCS12NK65V - N-Channel MOSFET (SemiHow)
  • HCS101 - Fixed Code Encoder (Microchip)
  • HCS109MS - Radiation Hardened Dual JK Flip Flop (Intersil)
  • HCS10MS - Radiation Hardened Triple 3-Input NAND Gate (Intersil)
  • HCS11MS - Radiation Hardened Triple 3-Input AND Gate (Intersil)
  • HCS132MS - Radiation Hardened Quad 2-Input NAND Schmitt Trigger (Intersil)
  • HCS138MS - Radiation Hardened Inverting3-to-8 Line Decoder/Demultiplexer (Intersil)
Other Datasheets by Intersil Corporation
  • HCS112MS - Radiation Hardened Dual JK Flip-Flop
  • HCS138T - Radiation Hardened Inverting 3-to-8 Line Decoder/Demultiplexer
  • HCS190MS - Radiation Hardened Synchronous 4-Bit Up/Down Counter
  • HCS00MS - Radiation Hardened Quad 2-Input NAND Gate
  • HCS02MS - Radiation Hardened Quad 2-Input NOR Gate
  • HCS04MS - Radiation Hardened Hex Inverter
  • HCS05MS - Radiation Hardened Hex Inverter with Open Drain
  • HCS08MS - Radiation Hardened Quad 2-Input AND Gate

Full PDF Text Transcription

Click to expand full text
HCS125MS September 1995 Radiation Hardened Quad Buffer, Three-State Pinouts 14 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE (SBDIP) MIL-STD-1835 CDIP2-T14, LEAD FINISH C TOP VIEW OE1 1 A1 2 Y1 3 OE2 4 A2 5 Y2 6 GND 7 14 VCC 13 OE4 12 A4 11 Y4 10 OE3 9 A3 8 Y3 Features • • • • • • • • • • • 3 Micron Radiation Hardened SOS CMOS Total Dose 200K RAD (Si) SEP Effective LET No Upsets: >100 MEV-cm2/mg Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day (Typ) Dose Rate Survivability: >1 x 1012 RAD (Si)/s Dose Rate Upset >1010 RAD (Si)/s, 20ns Pulse Latch-Up Free Under Any Conditions Military Temperature Range: -55oC to +125oC Significant Power Reduction Compared to LSTTL ICs DC Operating Voltage Range: 4.5V to 5.
Published: |