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8V41N010 - Clock Generator

Description

The 8V41N010 is a PLL-based clock generator specifically designed for Cavium Networks Octeon II processors.

Features

  • Eight selectable 100MHz and 156.25MHz clocks for PCI Express, sRIO and GbE, HCSL interface levels.
  • One single-ended QF LVCMOS/LVTTL clock output at 50MHz.
  • Selectable external crystal or differential (single-ended) input source.
  • Crystal oscillator interface designed for 25MHz, parallel resonant crystal.
  • Differential CLK, nCLK input pair that can accept: LVPECL, LVDS, LVHSTL, HCSL input levels.
  • Internal resistor bias on nCLK pin allows the use.

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Datasheet Details

Part number 8V41N010
Manufacturer Integrated Device Technology
File Size 613.29 KB
Description Clock Generator
Datasheet download datasheet 8V41N010 Datasheet
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Full PDF Text Transcription

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Clock Generator for Cavium Processors 8V41N010 General Description The 8V41N010 is a PLL-based clock generator specifically designed for Cavium Networks Octeon II processors. This high performance device is optimized to generate the processor core reference clock, the PCI-Express, sRIO, XAUI, SerDes reference clocks and the clocks for both the Gigabit Ethernet MAC and PHY. The output frequencies are generated from a 25MHz external input source or an external 25MHz parallel resonant crystal. The industrial temperature range of the 8V41N010 supports telecommunication, networking, and storage requirements. Pin Assignment DATA SHEET Features • Eight selectable 100MHz and 156.
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