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ICS9147-14 - Frequency Generator & Integrated Buffers

Description

The ICS9147-14 generates all clocks required for high speed RISC or CISC microprocessor systems such as Intel PentiumPro.

Two bidirectional I/O pins (FS1,FS2) are latched at power-on to the functionality table, with FS0 selectable in real-time to toggle between conditions.

Features

  • High drive PCICLK and SDRAM outputs typically provide greater than 1 V/ns slew rate into 30 pF loads. CPU outputs typically provide better than 1V/ns slew rate into 20 pF loads while maintaining 50 ± 5% duty cycle. The REF clock outputs typically provide better than 0.5V/ns slew rates. Seperate buffers supply pins VDDL1 allow for 3.3V or reduced voltage swing (from 2.9 to 2.5V) for CPU (0:3) and IOAPIC outputs. Block Diagram Four copies of CPU clock Twelve SDRAM (3.3V TTL), usable asAGP clock.

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Datasheet Details

Part number ICS9147-14
Manufacturer Integrated Circuit Systems
File Size 495.49 KB
Description Frequency Generator & Integrated Buffers
Datasheet download datasheet ICS9147-14 Datasheet

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Full PDF Text Transcription

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Integrated Circuit Systems, Inc. ICS9147-14 Frequency Generator & Integrated Buffers for PENTIUM/ProTM General Description The ICS9147-14 generates all clocks required for high speed RISC or CISC microprocessor systems such as Intel PentiumPro. Two bidirectional I/O pins (FS1,FS2) are latched at power-on to the functionality table, with FS0 selectable in real-time to toggle between conditions. • • • • • • • • • • • • • • • • • • • • Features High drive PCICLK and SDRAM outputs typically provide greater than 1 V/ns slew rate into 30 pF loads. CPU outputs typically provide better than 1V/ns slew rate into 20 pF loads while maintaining 50 ± 5% duty cycle. The REF clock outputs typically provide better than 0.5V/ns slew rates. Seperate buffers supply pins VDDL1 allow for 3.
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