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HY64UD16162B - 1M x 16 bit Low Low Power 1T/1C Pseudo SRAM

Description

and is subject to change without notice.

Hynix Semiconductor Inc.

does not assume any responsibility for use of circuits described.

Features

  • CMOS Process Technology.
  • 1M x 16 bit Organization.
  • TTL compatible and Tri-state outputs.
  • Deep Power Down : Memory cell data hold invalid.
  • Standard pin configuration : 48-FBGA(6mmX8mm).
  • Data mask function by /LB, /UB.
  • Separated I/O Power Supply : Vddq.

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Datasheet Details

Part number HY64UD16162B
Manufacturer SK Hynix
File Size 311.88 KB
Description 1M x 16 bit Low Low Power 1T/1C Pseudo SRAM
Datasheet download datasheet HY64UD16162B Datasheet

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Full PDF Text Transcription

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www.DataSheet4U.com HY64UD16162B Series Document Title 1M x 16 bit Low Low Power 1T/1C Pseudo SRAM Revision history Revision No. History 1.0 Initial Draft Date Dec. 3. ’02 Remark Preliminary This document is a general product description and is subject to change without notice. Hynix Semiconductor Inc. does not assume any responsibility for use of circuits described. No patent licenses are implied. Revision 1.0 / December. 2002 1 HY64UD16162B Series 1M x 16 bit Low Low Power 1T/1C SRAM DESCRIPTION The HY64UD16162B is a 16Mbit 1T/1C SRAM featured by high-speed operation and super low power consumption. The HY64UD16162B adopts one transistor memory cell and is organized as 1,048,576 words by 16bits.
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