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HY5DU12422B - 512 Mb DDR SDRAM

Download the HY5DU12422B datasheet PDF. This datasheet also covers the HY5DU121622 variant, as both devices belong to the same 512 mb ddr sdram family and are provided as variant models within a single manufacturer datasheet.

Description

and is subject to change without notice.

Hynix semiconductor does not assume any responsibility for use of circuits described.

No patent licenses are implied.

Features

  • VDD, VDDQ = 2.5V +/- 0.2V All inputs and outputs are compatible with SSTL_2 interface Fully differential clock inputs (CK, /CK) operation Double data rate interface Source synchronous - data transaction aligned to bidirectional data strobe (DQS) x16 device has two bytewide data strobes (UDQS, LDQS) per each x8 I/O Data outputs on DQS edges when read (edged DQ) Data inputs on DQS centers when write (centered DQ) On chip DLL ali.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (HY5DU121622_HynixSemiconductor.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
HY5DU281622 4 Banks x 2M x 16Bit Double Data Rate SDRAM Hyundai
HY5DU281622FTP 128Mb DDR SDRAM Hynix
HY5DU281622LT-H 4 Banks x 2M x 16Bit Double Data Rate SDRAM Hyundai
HY5DU281622LT-K 4 Banks x 2M x 16Bit Double Data Rate SDRAM Hyundai
HY5DU281622LT-L 4 Banks x 2M x 16Bit Double Data Rate SDRAM Hyundai

Other Datasheets by SK Hynix

Part Number Description
HY5DU12422ALT 512Mb DDR SDRAM
HY5DU12422AT 512Mb DDR SDRAM
HY5DU12422C 512 Mb DDR SDRAM
HY5DU121622ALT 512Mb DDR SDRAM
HY5DU121622AT 512Mb DDR SDRAM

Full PDF Text Transcription

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HY5DU12422B(L)TP HY5DU12822B(L)TP HY5DU121622B(L)TP 512Mb DDR SDRAM HY5DU12422B(L)TP HY5DU12822B(L)TP HY5DU121622B(L)TP This document is a general product description and is subject to change without notice. Hynix semiconductor does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev 0.1 / May 2004 1 HY5DU12422B(L)TP HY5DU12822B(L)TP HY5DU121622B(L)TP Revision History Revision No. 0.1 History Initial Draft Draft Date May 2004 Remark Rev. 0.
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