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74F651 • 74F652 Transceivers/Registers
March 1988 Revised August 1999
74F651 • 74F652 Transceivers/Registers
General Description
These devices consist of bus transceiver circuits with Dtype flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes to HIGH logic level. Output Enable pins (OEAB, OEBA) are provided to control the transceiver function.
74F651 Datasheet
