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74F652 - Transceivers/Registers

Description

These devices consist of bus transceiver circuits with D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from internal registers.

Features

  • s Independent registers for A and B buses s Multiplexed real-time and stored data s 74F652 non-inverting data path Ordering Code: Order Number 74F652SC (Note 1) 74F652SPC Package Number M24B N24C Package.

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Full PDF Text Transcription

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74F652 Transceivers/Registers March 1988 Revised January 2004 74F652 Transceivers/Registers General Description These devices consist of bus transceiver circuits with D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes to HIGH logic level. Output Enable pins (OEAB, OEBA) are provided to control the transceiver function. Features s Independent registers for A and B buses s Multiplexed real-time and stored data s 74F652 non-inverting data path Ordering Code: Order Number 74F652SC (Note 1) 74F652SPC Package Number M24B N24C Package Description 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.
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