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74ALVCH16240 - Low Voltage 16-Bit Inverting Buffer/Line Driver

Description

The ALVCH16240 contains sixteen inverting buffers with 3-STATE outputs to be employed as a memory and address driver, clock driver, or bus oriented transmitter/ receiver.

The device is nibble (4-bit) controlled.

Features

  • s 1.65V to 3.6V VCC supply operation s 3.6V tolerant control inputs and outputs s Bushold on data inputs eliminates the need for external pull-up/pull-down resistors s tPD 3.9 ns max for 3.0V to 3.6V VCC 5.3 ns max for 2.3V to 2.7V VCC 6.0 ns max for 1.65V to 1.95V VCC s Uses patented noise/EMI reduction circuitry s Latch-up conforms to JEDEC JED78 s ESD performance: Human body model > 2000V Machine model > 200V Ordering Code: Order Number 74ALVCH16240T Package Number MTD48 Package.

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Full PDF Text Transcription

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74ALVCH16240 Low Voltage 16-Bit Inverting Buffer/Line Driver September 2001 Revised February 2002 74ALVCH16240 Low Voltage 16-Bit Inverting Buffer/Line Driver with Bushold General Description The ALVCH16240 contains sixteen inverting buffers with 3-STATE outputs to be employed as a memory and address driver, clock driver, or bus oriented transmitter/ receiver. The device is nibble (4-bit) controlled. Each nibble has separate 3-STATE control inputs which can be shorted together for full 16-bit operation. The ALVCH16240 data inputs include active bushold circuitry, eliminating the need for external pull-up resistors to hold unused or floating inputs at a valid logic level. The 74ALVCH16240 is designed for low voltage (1.65V to 3.6V) VCC applications with output capability up to 3.6V.
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