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CYK001M16ZCCA - 16-Mbit (1M x 16) Pseudo Static RAM

Description

of read and write modes.

This device incorporates a Low Power mode wherein data integrity is not guaranteed, but Power Consumption reduces to less than 100 µW.

This mode (Deep Sleep Mode) is enabled by driving ZZ LOW.See the Truth Table for a complete description of Read, Write, and Deep Sleep mode.

Features

  • Wide voltage range: 2.70V.
  • 3.30V.
  • Access Time: 55 ns, 70 ns.
  • Ultra-low active power.
  • Typical active current: 3 mA @ f = 1 MHz.
  • Typical active current: 13 mA @ f = fmax.
  • Ultra low standby power.
  • Automatic power-down when deselected.
  • CMOS for optimum speed/power.
  • Deep Sleep Mode.
  • Offered in a 48-ball BGA Package (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE HIGH), outp.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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www.DataSheet4U.com CYK001M16ZCCA MoBL3™ 16-Mbit (1M x 16) Pseudo Static RAM Features • Wide voltage range: 2.70V–3.30V • Access Time: 55 ns, 70 ns • Ultra-low active power — Typical active current: 3 mA @ f = 1 MHz — Typical active current: 13 mA @ f = fmax • Ultra low standby power • Automatic power-down when deselected • CMOS for optimum speed/power • Deep Sleep Mode • Offered in a 48-ball BGA Package (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE HIGH), outputs are disabled (OE HIGH), both Byte High Enable and Byte Low Enable are disabled (BHE, BLE HIGH), or during a write operation (CE LOW and WE LOW). Writing to the device is accomplished by asserting Chip Enable (CE) and Write Enable (WE) inputs LOW.
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