Datasheet4U Logo Datasheet4U.com

CY7C1473V33 - (CY7C147xV33) 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM

Description

The CY7C1471V33, CY7C1473V33 and CY7C1475V33 are 3.3V, 2M x 36/4M x 18/1M x 72 synchronous flow through burst SRAMs designed specifically to support unlimited true back-to-back read or write operations without the insertion of wait states.

Features

  • No Bus Latency™ (NoBL™) architecture eliminates dead cycles between write and read cycles.
  • Supports up to 133 MHz bus operations with zero wait states.
  • Data is transferred on every clock.
  • Pin compatible and functionally equivalent to ZBT™ devices.
  • Internally self timed output buffer control to eliminate the need to use OE.
  • Registered inputs for flow through operation.
  • Byte Write capability.
  • 3.3V/2.5V IO supply (VDDQ).

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
CY7C1460SV25 36-Mbit (1M x 36/2M x 18) Pipelined SRAM Cypress
CY7C1462SV25 36-Mbit (1M x 36/2M x 18) Pipelined SRAM Cypress
CY7C1006D 1-Mbit (256K x 4) Static RAM Cypress
CY7C1011G 2-Mbit (128K words x 16 bit) Static RAM Cypress
CY7C1041G 4-Mbit (256K words x 16 bit) Static RAM Cypress

Other Datasheets by Cypress (Infineon)

Part Number Description
CY7C1473V25 (CY7C147xV25) 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM
CY7C1473BV33 72-Mbit (2 M x 36/4 M x 18) Flow-Through SRAM
CY7C147 4K x 1 STATIC RAM
CY7C1470BV25 (CY7C147xBV25) 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM
CY7C1470BV33 72-Mbit (2 M x 36/4 M x 18/1 M x 72) Pipelined SRAM

Full PDF Text Transcription

Click to expand full text
www.DataSheet4U.com CY7C1471V33 CY7C1473V33 CY7C1475V33 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM with NoBL™ Architecture Features • No Bus Latency™ (NoBL™) architecture eliminates dead cycles between write and read cycles • Supports up to 133 MHz bus operations with zero wait states • Data is transferred on every clock • Pin compatible and functionally equivalent to ZBT™ devices • Internally self timed output buffer control to eliminate the need to use OE • Registered inputs for flow through operation • Byte Write capability • 3.3V/2.5V IO supply (VDDQ) • Fast clock-to-output times — 6.
Published: |