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CY7B9920 - (CY7B9910 / CY7B9920) Low Skew Clock Buffer

Download the CY7B9920 datasheet PDF. This datasheet also covers the CY7B9910 variant, as both devices belong to the same (cy7b9910 / cy7b9920) low skew clock buffer family and are provided as variant models within a single manufacturer datasheet.

Description

Phase Frequency Detector and Filter These two blocks accept inputs from the reference frequency (REF) input and the feedback (FB) input and generate correction information to control the frequency of the Voltage-Controlled Oscillator (VCO).

Features

  • All outputs skew.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (CY7B9910_CypressSemiconductor.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription

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1CY 7B9 92 0 fax id: 3516 CY7B9910 CY7B9920 Low Skew Clock Buffer Features • • • • • • • • • All outputs skew <100 ps typical (250 max.) 15- to 80-MHz output operation Zero input to output delay 50% duty-cycle outputs Outputs drive 50Ω terminated lines Low operating current 24-pin SOIC package Jitter: <200 ps peak to peak, <25 ps RMS Compatible with Pentium™-based processors Block Diagram Description Phase Frequency Detector and Filter These two blocks accept inputs from the reference frequency (REF) input and the feedback (FB) input and generate correction information to control the frequency of the Voltage-Controlled Oscillator (VCO). These blocks, along with the VCO, form a Phase-Locked Loop (PLL) that tracks the incoming REF signal.
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