Datasheet4U Logo Datasheet4U.com

CY7B992 - Programmable Skew Clock Buffer

Description

The CY7B991 and CY7B992 Programmable Skew Clock Buffers (PSCB) offer user-selectable control over system clock Logic Block Diagram TEST Pin Configuration PLCC/LCC 3F0 2F1 FS FILTER REF FS 4F0 4F1 4 3F1 4Q0 SELECT INPUTS (THREE LEVEL) 4Q1 VCCQ SKEW 3Q0 3Q1 SELECT 2Q0 MATRIX 2Q1 1Q0 1Q1 7B991

Features

  • All output pair skew.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
CY7B8392 Ethernet Coax Transceiver Interface Cypress
CY7B8392 Low Power Ethernet Coaxial Transceiver Cypress
CY700SMS SMS Series 12 WATT Power-One
CY74FCT138T 1-OF-8 DECODERS Texas Instruments
CY74FCT157T QUAD 2-INPUT MULTIPLEXERS Texas Instruments

Other Datasheets by Cypress (Infineon)

Part Number Description
CY7B9920 (CY7B9910 / CY7B9920) Low Skew Clock Buffer
CY7B991 Programmable Skew Clock Buffer
CY7B9910 (CY7B9910 / CY7B9920) Low Skew Clock Buffer
CY7B9911 High-Speed Low-Voltage Programmable Skew Clock Buffer LV-PSCB
CY7B9911V High-Speed Low-Voltage Programmable Skew Clock Buffer LV-PSCB

Full PDF Text Transcription

Click to expand full text
92 CY7B991 CY7B992 Programmable Skew Clock Buffer Features • All output pair skew <100 ps typical (250 max.) • 3.75- to 80-MHz output operation • User-selectable output functions — Selectable skew to 18 ns — Inverted and non-inverted — Operation at 1⁄2 and 1⁄4 input frequency — Operation at 2x and 4x input frequency (input as low as 3.75 MHz) Zero input to output delay 50% duty-cycle outputs Outputs drive 50Ω terminated lines Low operating current 32-pin PLCC/LCC package Jitter < 200 ps peak-to-peak (< 25 ps RMS) Compatible with a Pentium™-based processor functions. These multiple-output clock drivers provide the system integrator with functions necessary to optimize the timing of high-performance computer systems.
Published: |