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DIR9001-Q1 - 96-kHz 24-Bit Digital Audio Interface Receiver

General Description

The DIR9001-Q1 is a digital audio interface receiver that can receive a 28-kHz to 108-kHz samplingfrequency, 24-bit-data-word, biphase-encoded signal.

Key Features

  • 1.
  • 23 One-Chip Digital Audio Interface Receiver (DIR) Including Low-Jitter Clock-Recovery System.
  • Compliant With Digital Audio Interface Standards: IEC60958 (former IEC958), JEITA CPR-1205 (former EIAJ CP-1201, CP-340), AES3, EBU tech3250.
  • Clock Recovery and Data Decode From Biphase Input Signal, Generally Called S/PDIF, EIAJ CP-1201, IEC60958, AES/EBU.
  • Biphase Input Signal Sampling Frequency (fS) Range: 28 kHz to 108 kHz.
  • Low-Jitter Recovered System C.

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📁 Similar Datasheet

Part Number Description Manufacturer
DIR9001 96-kHz 24-Bit Digital Audio Interface Receiver Texas Instruments

Other Datasheets by Burr-Brown (Texas Instruments)

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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BurrĆBrown Products from Texas Instruments DIR9001-Q1 SLLS843A – JUNE 2007 – REVISED FEBRUARY 2008 96-kHz, 24-Bit Digital Audio Interface Receiver FEATURES 1 •23 One-Chip Digital Audio Interface Receiver (DIR) Including Low-Jitter Clock-Recovery System • Compliant With Digital Audio Interface Standards: IEC60958 (former IEC958), JEITA CPR-1205 (former EIAJ CP-1201, CP-340), AES3, EBU tech3250 • Clock Recovery and Data Decode From Biphase Input Signal, Generally Called S/PDIF, EIAJ CP-1201, IEC60958, AES/EBU • Biphase Input Signal Sampling Frequency (fS) Range: 28 kHz to 108 kHz • Low-Jitter Recovered System Clock: 50 ps • Jitter Tolerance Compliant With IEC60958-3 • Selectable Recovered System Clock: 128 fS, 256 fS, 384 fS, 512 fS • Serial Audio Data Output Formats: 24-Bit I2S; MSB-First,