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AD9511 - 1.2 GHz Clock Distribution IC

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General Description

The AD9511 provides a multi-output clock distribution function along with an on-chip PLL core.

The design emphasizes low jitter and phase noise to maximize data converter performance.

Other applications with demanding phase noise and jitter requirements also benefit from this part.

Overview

1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Five Outputs.

Key Features

  • Low phase noise phase-locked loop core Reference input frequencies to 250 MHz Programmable dual-modulus prescaler Programmable charge pump (CP) current Separate CP supply (VCPS) extends tuning range Two 1.6 GHz, differential clock inputs 5 programmable dividers, 1 to 32, all integers Phase select for output-to-output coarse delay adjust 3 independent 1.2 GHz LVPECL outputs Additive output jitter 225 fs rms 2 independent 800 MHz/250 MHz LVDS/CMOS clock outputs Additive output jitter 275 fs rms Fi.

More Datasheets from Analog Devices

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