AS7C1025
Features
- AS7C1025 (5V version)
- AS7C31025 (3.3V version)
- Industrial and mercial temperatures
- Organization: 131,072 words × 8 bits
- High speed
- 12/15/20 ns address access time
- 6,7,8 ns output enable access time
- Low power consumption: ACTIVE
- 715 m W (AS7C1025) / max @ 12 ns (5V)
- 360 m W (AS7C31025) / max @ 12 ns (3.3V)
- Low power consumption: STANDBY
- 27.5 m W (AS7C1025) / max CMOS (5V)
- 1.8 m W (AS7C31025) / max CMOS (3.3V)
- 2.0V data retention
- Easy memory expansion with CE, OE inputs
- Center power and ground
- TTL/LVTTL-patible, three-state I/O
- JEDEC-standard packages
- 32-pin, 300 mil SOJ
- 32-pin, 400 mil SOJ
- 32-pin TSOP II
- ESD protection ≥ 2000 volts
- Latch-up current ≥ 200 m A
Logic block diagram
Pin arrangement
Row decoder Sense amp
VCC GND
Input buffer
A0
A1
A2 A3 A4
512×256×8 Array
A5 (1,048,576)
A6
A7
A8
I/O7...
