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A67L9336 Datasheet (A67L0618 / A67L9336) Pipelined ZeBL SRAM

Manufacturer: AMIC Technology

Download the A67L9336 datasheet PDF. This datasheet also includes the A67L0618 variant, as both parts are published together in a single manufacturer document.

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Note: The manufacturer provides a single datasheet file (A67L0618_AMICTechnology.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number A67L9336
Manufacturer AMIC Technology
File Size 252.34 KB
Description (A67L0618 / A67L9336) Pipelined ZeBL SRAM
Datasheet download datasheet A67L9336 Datasheet

General Description

The AMIC Zero Bus Latency (ZeBLTM) SRAM family employs high-speed, low-power CMOS designs using an advanced CMOS process.

The A67L0618, A67L9336 SRAMs integrate a 1M X 18, 512K X 36 SRAM core with advanced synchronous peripheral circuitry and a 2-bit burst counter.

These SRAMs are optimized for 100 percent bus utilization without the insertion of any wait cycles during Write-Read alternation.

Overview

A67L0618/A67L9336 Preliminary Document Title 1M X 18, 512K X 36 LVTTL, Pipelined ZeBLTM SRAM Revision History Rev.

No.

0.0 1M X 18, 512K X 36 LVTTL, Pipelined ZeBLTM SRAM History Initial issue Issue Date August, 20, 2005 Remark Preliminary PRELIMINARY (August, 2005, Version 0.0) AMIC Technology, Corp.

Key Features

  • Fast access time: 2.6/2.8/3.2/3.5/3.8/4.2 (250/227/200/166/150/133MHz) Zero Bus Latency between READ and WRITE cycles allows 100% bus utilization Signal +3.3V ± 5% power supply Individual Byte Write control capability Clock enable ( CEN ) pin to enable clock and suspend operations Clock-controlled and registered address, data and control signals Registered output for pipelined.