XC9572XL - High Performance CPLD

Xilinx

XC9572XL Datasheet Preview — Preview of XC9572XL PDF

Datasheet Details

Part number	XC9572XL
Manufacturer	Xilinx
File Size	184.29 KB
Description	High Performance CPLD
Datasheet	XC9572XL_XilinxInc.pdf

XC9572XL Product details

Description

The XC9572XL is a 3.3V CPLD targeted for high-performance, low-voltage applications in leading-edge communi- Product Specification cations and computing systems.It is comprised of four 54V18 Function Blocks, providing 1,600 usable gates with propagation delays of 5 ns.See Figure 2 for overview.Power Estimation Power dissipation in CPLDs can vary substantially depending on the system frequency, design application and output loading.To help reduce power dissipation, each macrocell in a XC9500

Features

5 ns pin-to-pin logic delays.
System frequency up to 178 MHz.
72 macrocells with 1,600 usable gates.
Available in small footprint packages - 44-pin PLCC (34 user I/O pins) - 44-pin VQFP (34 user I/O pins) - 48-pin CSP (38 user I/O pins) - 64-pin VQFP (52 user I/O pins) - 100-pin TQFP (72 user I/O pins) - Pb-free available for all packages.
Optimized for high-performance 3.3V systems - Low power operation - 5V tolerant I/O pins accept 5V, 3.3V, and 2.

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Published: Apr 16, 2005 |