74F597 Datasheet (Philips) - 8-Bit Shift Register

74F597, 8-Bit Shift Register

The 74F597 consists of an 8-bit storage register feeding a parallel-in/serial-in, serial-out 8-bit shift register.

The storage register and shift register have separate positive edge triggered clocks.

The shift register has asynchronous reset and when SHCP is Low, it has asynchronous load.

The shift

74F597 Features

* High impedance PNP base inputs for reduced loading (20µA in High and Low states) PIN CONFIGURATION D1 D2 D3 D4 D5 D6 D7 GND 1 2 3 4 5 6 7 8 16 VCC 15 D0 14 DS 13 SHLD 12 STCP 11 SHCP 10 SHRST 9 QS

* 8-bit parallel storage register

* 3-State output buffers

* Shift