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NB4N316M AnyLevel Receiver to CML Driver/Translator

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Description

NB4N316M 3.3 V AnyLevel] Receiver to CML Driver/Translator with Input Hysteresis 2.0 GHz Clock / 2.5 Gb/s Data The NB4N316M is a differential Clock o.
Pin Name I/O Description 1 NC. No Connect.

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Features

* an input threshold hysteresis of approximately 25 mV, providing increased noise immunity and stability. The device is offered in a small 8
* pin TSSOP package (MSOP

Applications

* The CML outputs are 16 mA open collector (see Figure 18) which requires resistor (RL) load path to VTT termination voltage (see Figure 19). The open collector CML outputs must be terminated to VTT at power up. The differential outputs produce Current
* Mode Logic (CML) compatible levels when

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