NB3N4666C Datasheet (ON Semiconductor) - 3.3 V Quad LVCMOS Differential Line Receiver Translator

NB3N4666C, 3.3 V Quad LVCMOS Differential Line Receiver Translator

The NB3N4666C is a quad *channel LVDS line receiver/translator offering data rates up to 400 Mbps (200 MHz) and low power consumption.

The NB3N4666C receiver incorporates input fail *safe protection circuit that provides a known output voltage under input open *circuit, short an

NB3N4666C Features

* Accepts M

* LVDS, LVDS, LVPECL and HCSL Differential Input Signal Levels

* Maximum Data Rate of 400 Mbps

* Maximum Clock Frequency of 200 MHz

* 25 ps Typical Channel

* to

* Channel Skew

* 3.3 ns Maximum Propagation Delay

* 3.3 V ±10