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NB3N121K 3.3V Differential 1:21 Fanout Clock and Data Driver

NB3N121K Description

NB3N121K 3.3V Differential 1:21 Fanout Clock and Data Driver with HCSL Outputs .
The NB3N121K is a differential 1:21 Clock and Data fanout buffer with High. speed Current Steering Logic (HCSL) outputs optimized for ultra low.

NB3N121K Features

* Typical Input Clock Frequency 100, 133, 166, 200, 266, 333 and 400 MHz
* 340 ps Typical Rise and Fall Times
* 800 ps Typical Propagation Delay
* 100 ps Max Within Device Skew
* 150 ps Max Device
* to
* Device Skew
* Dtpd 100 ps Maximum Pr

NB3N121K Applications

* in mind. Inputs can directly accept differential LVPECL, HCSL, and LVDS signals per Figures 7, 8, and 9. Single ended LVPECL, HCSL, LVCMOS, or LVTTL levels are accepted with a proper external Vth reference supply per Figures 4 and 10. Input pins incorporate separate internal 50 W termination resisto

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ON Semiconductor NB3N121K-like datasheet