DS90CF386 Datasheet (National Semiconductor)

DS90CF386, +3.3V LVDS Receiver

The DS90CF386 receiver converts the four LVDS data streams (Up to 2.38 Gbps throughput or 297.5 Megabytes/ sec bandwidth) back into parallel 28 bits of CMOS/TTL data (24 bits of RGB and 4 bits of Hsync, Vsync, DE and CNTL).

Also available is the DS90CF366 that converts the three LVDS data streams (U

DS90CF386 Features

* n 20 to 85 MHz shift clock support n Rx power consumption < 142 mW (typ) @85MHz Grayscale n Rx Power-down mode < 1.44 mW (max) n ESD rating > 7 kV (HBM), > 700V (EIAJ) n Supports VGA, SVGA, XGA and Single Pixel SXGA. n PLL requires no external components n Compatible with TIA/EIA-644 LVDS standard n