74AUP2G79 Low-power dual D-type flip-flop

NXP Semiconductors

Description

www.DataSheet4U.com 74AUP2G79 Low-power dual D-type ﬂip-ﬂop; positive-edge trigger Rev.02 * 19 March 2008 Product data sheet 1.General des.
The 74AUP2G79 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.

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Datasheet Specifications

Part number: 74AUP2G79
Manufacturer: NXP ↗ Semiconductors
File Size: 146.02 KB
Datasheet: 74AUP2G79_NXPSemiconductors.pdf
Description: Low-power dual D-type flip-flop

Features

* I Wide supply voltage range from 0.8 V to 3.6 V I High noise immunity I Complies with JEDEC standards: N JESD8-12 (0.8 V to 1.3 V) N JESD8-11 (0.9 V to 1.65 V) N JESD8-7 (1.2 V to 1.95 V) N JESD8-5 (1.8 V to 2.7 V) N JESD8-B (2.7 V to 3.6 V) I ESD protection: N HBM JESD22-A114E Class 3A exceeds 5000

Applications

* using IOFF. The IOFF circuitry disables the output, preventing a damaging backﬂow current through the device when it is powered down. The 74AUP2G79 provides the dual positive-edge triggered D-type ﬂip-ﬂop. Information on the data input (nD) is transferred to the nQ output on the LOW-to-HIGH transiti

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📁 Related Datasheet

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74AUP2G79 Low-power dual D-type flip-flop NXP Semiconductors

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