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74AUP2G02 DUAL NOR GATE

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Description

NEW PRODUCT 74AUP2G02 DUAL NOR GATE .
Pin Assignments The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications.

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Features

* Advanced Ultra Low Power (AUP) CMOS
* Supply Voltage Range from 0.8V to 3.6V
* ±4mA Output Drive at 3.0V
* Low Static Power Consumption ICC < 0.9µA
* Low Dynamic Power Consumption CPD = 6 pF (Typical at 3.6V)
* Schmitt Trigger Action at all inputs ma

Applications

* The 74AUP2G02 is a dual two-input NOR gate. Both gates have push-pull outputs designed for operation over a power supply range of 0.8 V to 3.6 V. The device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output preventing damaging current backflow

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