Datasheet4U Logo Datasheet4U.com

74AUP2G14 - DUAL SCHMITT TRIGGER INVERTERS

General Description

The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications.

The 74AUP2G14 is composed of two Schmitt trigger inverters with standard push-pull outputs designed for operation over a power supply range of 0.8V to 3.6V.

Key Features

  • Advanced Ultra Low Power (AUP) CMOS Supply Voltage Range from 0.8V to 3.6V ± 4mA Output Drive at 3.0V Low Static power consumption ICC < 0.9µA Low Dynamic Power Consumption CPD = 4pF Typical at 3.6V Schmitt Trigger Action at All Inputs Make the Circuit Tolerant for Slower Input Rise and Fall Time. IOFF Supports Partial-Power-Down Mode Operation ESD Protection per JESD 22.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
74AUP2G14 Low-power dual Schmitt trigger inverter nexperia
74AUP2G125 Low-power dual buffer/line driver NXP Semiconductors
74AUP2G125 Low-power dual buffer/line driver nexperia
74AUP2G126 Low-power dual buffer/line driver NXP
74AUP2G126 Low-power dual buffer/line driver nexperia

Other Datasheets by Diodes Incorporated

Part Number Description
74AUP2G125 DUAL 3-STATE BUFFER
74AUP2G126 DUAL 3-STATE BUFFER
74AUP2G17 DUAL SCHMITT TRIGGER BUFFERS
74AUP2G00 DUAL NAND GATE
74AUP2G02 DUAL NOR GATE

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
74AUP2G14 DUAL SCHMITT TRIGGER INVERTERS Description The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications. The 74AUP2G14 is composed of two Schmitt trigger inverters with standard push-pull outputs designed for operation over a power supply range of 0.8V to 3.6V. The device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the Pin Assignments NEW PRODUCT output preventing damaging current backflow when the device is powered down. The gates perform the positive Boolean function: Y=A Features • • • • • • • • • • Advanced Ultra Low Power (AUP) CMOS Supply Voltage Range from 0.8V to 3.6V ± 4mA Output Drive at 3.0V Low Static power consumption ICC < 0.