S7A801830M Description
S7A803630M SS77AA880013863300MM S7A801830M 256Kx36 & 512Kx18 Sync-Pipelined Burst SRAM 256Kx36 & 512Kx18 Sync-Pipelined Burst SRAM 9Mb Sync.Pipelin.
The S7A803630M and S7A801830M are 9,437,184-bit Synchronous Static Random Access Memory designed for high performance.
S7A801830M Features
* VDD = 1.8V (1.7V ~ 2.0V) or 2.5V(2.3V ~ 2.7V) or 3.3V(3.1V ~ 3.5V) Power Supply
* VDDQ = 1.7V~2.0V I/O Power Supply (VDD=1.8V) or 2.3V~2.7V I/O Power Supply (VDD=2.5V) or 2.3V~3.5V I/O Power Supply (VDD=3.3V)
* Synchronous Operation
* 2 Stage Pipelined operation wit
S7A801830M Applications
* GW, BW, LBO, ZZ. Write cycles are internally selftimed and synchronous. Full bus-width write is done by GW, and each byte write is performed by the combination of WEx and BW when GW is high. And with CS1 high, ADSP is blocked to control signals. Burst cycle can be initiated with either the address
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