S7A321830M Description
S7A323630M SS77AA332213863300MM S7A321830M 1Mx36 & 2Mx18 Sync-Pipelined Burst SRAM 1Mx36 & 2Mx18 Sync-Pipelined Burst SRAM 36Mb Sync.Pipelined Burs.
The S7A323630M and S7A321830M are 32,748,736-bit Synchronous Static Random Access Memory designed for high performance.
S7A321830M Features
* VDD = 1.8V (1.7V ~ 2.0V) or 2.5V (2.3V ~ 2.7V) or 3.3V (3.1V ~ 3.5V) Power Supply
* VDDQ = 1.7V ~ 2.0V I/O Power Supply (VDD=1.8V) or 2.3V ~ 2.7V I/O Power Supply (VDD=2.5V) or 2.3V ~ 3.5V I/O Power Supply (VDD=3.3V)
* Synchronous Operation
* 2 Stage Pipelined opera
S7A321830M Applications
* GW, BW, LBO, ZZ. Write cycles are internally self-timed and synchronous. Full bus-width write is done by GW, and each byte write is performed by the combination of WEx and BW when GW is high. And with CS1 high, ADSP is blocked to control signals. Burst cycle can be initiated with either the address
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